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Table of Contents
SD-8516 Technical Manual
Introduction
The Stellar Dynamics SD-8516 represents a categorical reimagining of microprocessor architecture. This 16-bit CPU, implemented in AssemblyScript for the VC-3 computer system, delivers performance exceeding conventional silicon constraints through advanced cross-boundary resonance microcascades.
Key Specifications:
- 16-bit architecture with 16 general-purpose registers
- Clock speed: 10-20 MHz (targeting 3-5 MIPS)
- Memory: 256KB addressable via 4-bank system
- ~10× performance improvement over legacy 8510 design
System Lore
Since the days of the first minicomputers, Stellar Dynamics has been at the forefront of microarchitecture design. The SD-8516 is not simply an iteration upon its predecessors; it is a categorical reimagining of what a “processor” can be when unshackled from quantum locality.
While our earliest designs struggled with resonance cascade instability, the SD-8516 delivers stable, predictable cross-boundary resonance microcascades at clock rates exceeding the theoretical limits of conventional silicon.
These advancements position the Stellar Dynamics SD-8516 as the definitive architecture for next-generation computation: a bridge between classical logic engines and the emergent technologies of multidimensional processing.
CPU Architecture
Register Set
The SD-8516 features sixteen 16-bit registers:
| Register | Name | Primary Use |
|---|---|---|
| R0 | A | Accumulator |
| R1 | B | Accumulator |
| R2 | X | Index/General |
| R3 | Y | Index/General |
| R4 | I | Loop/General |
| R5 | J | Loop/General |
| R6 | K | Loop/General |
| R7 | T | Temporary/General |
| R8 | M | Memory Pointer |
| R9 | D | Memory Pointer |
| R10 | E | Extra/General |
| R11 | C | Counter/General |
| R12 | F | Function Register |
| R13 | G | General Purpose |
| R14 | L | General Purpose |
| R15 | Z | General Purpose |
Note: The SD-8516 does not use register pairing except for multiplication operations, which store results in the AB register pair.
Register Encoding
Registers are encoded as 4-bit values (0-15), allowing two registers per byte:
- Low nibble: First operand
- High nibble: Second operand
Example: ADD A, B encodes as 0x01 (A=0, B=1)
Flags Register
The 16-bit FLAGS register contains:
Arithmetic Flags (Byte 1):
- Bit 0: Z (Zero) - Result was zero
- Bit 1: N (Negative) - Result was negative (bit 15 set)
- Bit 2: C (Carry) - Unsigned overflow/borrow
- Bit 3: V (Overflow) - Signed overflow
- Bits 4-7: Reserved
Control Flags (Byte 2):
- Bit 8: H (Halt) - CPU stopped, waiting for interrupt
- Bit 9: T (Trace) - Single-step debugging mode
- Bit 10: B (Breakpoint) - Breakpoint mode active
- Bit 11: E (Exception) - Sticky error flag
- Bit 12: P (Protected) - Protected mode enabled
- Bit 13: I (Interrupt) - Interrupt enable/disable
- Bit 14: S (Sound) - Sound System Interrupt enable
- Bit 15: Reserved
Layout: Z N C V - - - - H T B E P I S -
Memory Architecture
Memory Map
| Address Range | Description |
|---|---|
| $0000-$00FF | Zero page / System variables |
| $0100-$DFFF | User program space |
| $E000-$EFFF | KERNAL ROM (4KB) |
| $F000-$F3E7 | Video text buffer (1000 bytes) |
| $F800-$FBFF | Video color buffer (1000 bytes) |
| $E800-$E8FF | Character ROM (2048 bytes) |
Bank Addressing
The SD-8516 supports 4 banks of 64KB each (256KB total) through special addressing modes:
LDA [I:J] ; Load from bank I, offset J STA [2:$1000] ; Store to bank 2, offset $1000
Bank allocation:
- Bank 0: System RAM, program space
- Bank 1: Audio samples and sound registers
- Bank 2: Primary video framebuffer + palette
- Bank 3: Secondary video buffer (high-resolution modes)
System Variables
| Address | Description |
|---|---|
| $EF00 | Video mode register |
| $EF01 | Column count (40 or 80) |
| $EF02 | Row count (25) |
| $EF03 | Character width (8) |
| $EF04 | Character height (8) |
| $EF05-$EF08 | Hardware clock (32-bit milliseconds) |
| $EF09 | Default character color |
| $EF0A | Cursor color |
| $EF0B | Color palette mode (0=COLORDORE, 1=CGA 5153) |
| $EF10 | Cursor X position |
| $EF11 | Cursor Y position |
| $EF12 | Cursor blink state |
| $EF20 | Keyboard status flags |
| $EF21 | Keyboard buffer count |
| $EF22-$EF31 | Keyboard buffer (16 bytes) |
Instruction Set Architecture
Load/Store Instructions
| Opcode | Mnemonic | Description | Bytes |
|---|---|---|---|
| 00 | LD_IMM | Load immediate word | 3 |
| 01 | LD_IMMB | Load immediate byte | 2 |
| 02 | LD_IMMW | Load immediate word | 3 |
| 03 | LD_MEM | Load from memory (indirect) | 3 |
| 04 | LD_MEMB | Load byte from memory | 3 |
| 05 | LD_MEMW | Load word from memory | 3 |
| 06 | LD_RI | Load from register indirect | 2 |
| 07 | LD_RIB | Load byte from register indirect | 2 |
| 08 | LD_RIW | Load word from register indirect | 2 |
| 09 | ST_MEM | Store to memory | 5 |
| 0A | ST_MEMB | Store byte to memory | 5 |
| 0B | ST_MEMW | Store word to memory | 5 |
Examples:
LDA #$1234 ; Load immediate $1234 into A LDAL #$42 ; Load immediate byte $42 into AL LDA [$F000] ; Load word from address $F000 STA [2:$1000] ; Store A to bank 2, offset $1000
Arithmetic Operations
| Instruction | Description | Flags Affected |
|---|---|---|
| ADD | Add | Z, N, C, V |
| ADDB | Add bytes | Z, N, C, V |
| SUB | Subtract | Z, N, C, V |
| SUBB | Subtract bytes | Z, N, C, V |
| MUL | Multiply (result in AB) | Z, N |
| MULB | Multiply bytes | Z, N |
| DIV | Divide (quotient in A, remainder in B) | Z, N |
| DIVB | Divide bytes | Z, N |
| MOD | Modulo | Z, N |
| MODB | Modulo bytes | Z, N |
| INC | Increment | Z, N |
| DEC | Decrement | Z, N |
Logic Operations
| Instruction | Description | Flags Affected |
|---|---|---|
| AND | Bitwise AND | Z, N |
| ANDB | Bitwise AND (byte) | Z, N |
| OR | Bitwise OR | Z, N |
| ORB | Bitwise OR (byte) | Z, N |
| XOR | Bitwise XOR | Z, N |
| XORB | Bitwise XOR (byte) | Z, N |
| NOT | Bitwise NOT | Z, N |
| NOTB | Bitwise NOT (byte) | Z, N |
| TEST | Bitwise AND (no write) | Z, N |
| TESTB | Bitwise AND byte (no write) | Z, N |
Shift/Rotate Operations
| Instruction | Description | Flags Affected |
|---|---|---|
| SHL | Shift left | Z, N, C |
| SHLB | Shift left byte | Z, N, C |
| SHR | Shift right | Z, N, C |
| SHRB | Shift right byte | Z, N, C |
| ROL | Rotate left | Z, N, C |
| ROLB | Rotate left byte | Z, N, C |
| ROR | Rotate right | Z, N, C |
| RORB | Rotate right byte | Z, N, C |
Comparison & Branching
| Instruction | Description | Flags Affected |
|---|---|---|
| CMP | Compare (subtract, discard result) | Z, N, C, V |
| CMPB | Compare bytes | Z, N, C, V |
| JMP | Unconditional jump | None |
| JZ | Jump if zero | None |
| JNZ | Jump if not zero | None |
| JC | Jump if carry set | None |
| JNC | Jump if carry clear | None |
| JN | Jump if negative | None |
| JNN | Jump if not negative | None |
| JV | Jump if overflow | None |
| JNV | Jump if no overflow | None |
| JL | Jump if less (signed) | None |
| JNL | Jump if not less | None |
| JG | Jump if greater (signed) | None |
| JNG | Jump if not greater | None |
Subroutine Operations
| Instruction | Description |
|---|---|
| CALL | Call subroutine (push IP, jump) |
| RET | Return from subroutine (pop IP) |
| PUSH | Push register to stack |
| POP | Pop from stack to register |
| PUSHA | Push all registers |
| POPA | Pop all registers |
System Operations
| Instruction | Description |
|---|---|
| NOP | No operation |
| HALT | Halt CPU (set H flag) |
| INT | Software interrupt |
| TICK | Performance counter tick |
| SSI | Enable Sound System Interrupts |
| CSI | Clear Sound System Interrupts |
| SEC | Set carry flag |
| CLC | Clear carry flag |
| SEZ | Set zero flag |
| CLZ | Clear zero flag |
| SEN | Set negative flag |
| CLN | Clear negative flag |
| SEV | Set overflow flag |
| CLV | Clear overflow flag |
Sound System (SD-450)
The SD-8516 is paired with the SD-450 sound subsystem, featuring 4 independent voices with ADSR envelopes.
Voice Architecture
Each voice occupies 16 bytes of memory in Bank 1:
| Offset | Register | Description |
|---|---|---|
| +$00 | FREQ_LO | Frequency low byte |
| +$01 | FREQ_HI | Frequency high byte |
| +$02 | GATE | Waveform/gate control |
| +$03 | VOLUME | Volume (0-255) |
| +$04 | ATTACK | Attack time |
| +$05 | DECAY | Decay time |
| +$06 | SUSTAIN | Sustain level |
| +$07 | RELEASE | Release time |
| +$08 | DATA1 | Pulse width / noise type |
| +$09-$0F | Reserved | Future expansion |
Voice base addresses:
- Voice 0:
$ED00 - Voice 1:
$ED10 - Voice 2:
$ED20 - Voice 3:
$ED30
Waveforms
Gate register values:
- 0: Silent (gate off)
- 1: Square wave
- 2: Triangle wave
- 3: Sawtooth wave
- 4: Sine wave
- 5: Pulse wave (variable width via DATA1)
- 6: White/pink/brown noise (type via DATA1)
ADSR Envelope
The Attack-Decay-Sustain-Release envelope shapes each note:
- Attack: Time to reach peak volume (0-255 × 10ms)
- Decay: Time to decay to sustain level (0-255 × 10ms)
- Sustain: Held volume level (0.0-1.0 of peak)
- Release: Time to fade to silence after gate off (0-255 × 10ms)
Example:
; Play middle C on voice 0 LDA $112B ; C4 frequency (262 Hz / 0.0596) STA [$ED00] ; FREQ_LO/HI LDAL $01 ; Square wave STAL [$ED02] ; GATE LDAL $4D ; ~30% volume STAL [$ED03] ; VOLUME
Video System
Video Modes
The VC-3 supports both text and graphics modes:
| Mode | Resolution | Colors | Description |
|---|---|---|---|
| 1 | 40×25 text | 16 | Character mode, COLORDORE palette |
| 2 | 80×25 text | 16 | High-res text, CGA 5153 palette |
| 3 | 320×200 | 16 | Packed pixels (4-bit) |
| 4 | 256×224 | 256 | SNES-style mode |
| 8 | 128×128 | 16 | Low-res mode |
Text Mode Architecture
Mode 1 (40×25):
- Character buffer:
$F000-$F3E7(1000 bytes) - Color buffer:
$F800-$FBE7(1000 bytes) - Character ROM:
$E800-$E8FF(256 characters × 8 bytes)
Color byte format: (bg_color << 4) | fg_color
Mode 2 (80×25):
- Same layout, 2000 bytes each
- Scanline doubling for 640×400 output
Graphics Mode Architecture
Mode 3 (320×200×16):
- Framebuffer: Bank 2,
$00000-$07CFF(32,000 bytes) - Palette: Bank 2,
$F000-$F02F(16 colors × 3 bytes RGB) - Pixel packing: 2 pixels per byte (high/low nibbles)
Pixel addressing:
offset = (y × 160) + (x ÷ 2) address = Bank 2 + offset
Mode 4 (256×224×256):
- Framebuffer: Bank 2,
$00000-$DFFFF(57,344 bytes) - Palette: Bank 2,
$F000-$F2FF(256 colors × 3 bytes RGB) - 1 byte per pixel (256 colors)
Palette Format
Each palette entry is 3 bytes (RGB):
Offset +0: Red (0-255)
Offset +1: Green (0-255)
Offset +2: Blue (0-255)
KERNAL Functions
The KERNAL ROM provides system services at $E000:
Input/Output
GETKEY - Read keyboard buffer
IN: None
OUT: A = ASCII character (if available)
B = previous buffer count
WRITE_CHAR - Write character to screen
IN: A = character code
X = column (0-39/79)
Y = row (0-24)
WRITE_STRING - Write null-terminated string
IN: A = string address (low byte)
B = string address (high byte)
X = column
Y = row
Cursor Management
CTOXY - Move cursor
IN: X = column
Y = row
GETCURSOR - Read cursor position
OUT: X = column
Y = row
String Utilities
STRLEN - Get string length
IN: A = string address (low byte)
B = string address (high byte)
OUT: A = length (low byte)
B = length (high byte)
C = carry flag if > 256 bytes
BYTETOSTR - Convert byte to decimal string
IN: A = byte value (0-255)
X = destination address (low)
Y = destination address (high)
OUT: Zero-terminated string at XY
Arrow Key Handlers
- ARR_LEFT - Move cursor left (bounded)
- ARR_RIGHT - Move cursor right (bounded)
- ARR_UP - Move cursor up (bounded)
- ARR_DOWN - Move cursor down (bounded)
Assembly Language
Syntax
Labels:
loop: ; Define label
JMP @loop ; Reference label with @
Immediates:
LDA #$1234 ; Hexadecimal LDA #100 ; Decimal LDAL #'A' ; Character literal
Comments:
; Single-line comment
Data Directives:
.equ CONSTANT $1234 ; Define constant .bytes "Hello", 0 ; Byte array .word $1234, $5678 ; Word array
Example Programs
Hello World:
LDA @MSG
LDX #0
LDY #0
CALL @WRITE_STRING
RET
MSG:
.bytes "HELLO WORLD!", 0
Fill Screen with Stars:
LDAL #'*' ; Character to draw
LDX #0 ; Start column
LDY #0 ; Start row
loop:
CALL @WRITE_CHAR
INC X
CMP X, #40
JNZ @loop
LDX #0 ; Reset column
INC Y
CMP Y, #25
JNZ @loop
RET
Random Number Generator (Galois LFSR):
.equ RND_SEED $EFF0
rnd_init:
LDA [$EF05] ; Hardware clock
LDB [$EF06]
XOR A, B
STA [@RND_SEED]
RET
rnd_byte:
LDA [@RND_SEED]
MOV B, A
ANDB BL, $01 ; Check LSB
SHR A ; Shift right
CMPB BL, $00
JZ @no_xor
LDB $B400 ; Polynomial
XOR A, B
no_xor:
STA [@RND_SEED]
RET
Performance Characteristics
Measured Performance:
- Clock speed: 10 MHz base, up to 100 MHz
- Sustained MIPS: 60 MIPS (i7-12700k)
- Memory bandwidth: ~280 MB/s
- Sound system overhead: < 5% CPU time
- Video refresh: 60 Hz (16.67ms frame time)
Optimization Notes:
- Batch instruction execution (787,401 instructions per batch at 100 MIPS target)
- MessageChannel-based scheduling for low-latency loops
- Time-debt throttling maintains consistent clock rate
- Sound updates triggered by register writes (not polling)
Technical Implementation
Architecture: WebAssembly-based virtual CPU Languages: AssemblyScript (CPU core), JavaScript (I/O systems) Memory Model: 4 banks of 64k RAM Audio Backend: SD-450 4 voice polyphonic 5 waveform Audio System Video Backend: 9 mode Text and Graphics pixel-perfect render engine
Appendix: Planned Features
KERNAL Functions (In Development)
- print_byte - Display 16-bit number at cursor
- print_char_at - Single character without moving cursor
- clear_screen - Fill screen with spaces
- print_at - Positioned string output
- string_compare - String equality test
- string_to_upper - Case conversion
- wait_key - Blocking key wait
- random_range - Bounded random numbers
- draw_box - Border rendering
- scroll_region - Partial screen scrolling
- save_screen/restore_screen - Screen buffer management
Graphics Enhancements
- Bresenham line drawing (implemented)
- Sprite system with hardware acceleration
- Tilemap support for scrolling backgrounds
- Bitmap font rendering
Sound Enhancements
- PCM streaming for voice/SFX
- Additional waveforms (filtered noise, PWM variants)
- Other sample playback (Opus/Ogg compressed)
- LFO and vibrato effects
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SD-8516 Technical Manual - Revision 1.0 Copyright © 2025 Appledog Hu All specifications subject to change as quantum resonance research continues.
